Abstract
In this brief, a novel power and speed optimization methodology of current mode logic (CML) dividers is presented, which is based on the injection-locking concept from injection-locked frequency dividers. It helps to realize a CML divider of high performance, including high operation frequency, low power consumption, and a wide division locking range. This concept is newly introduced to explain why shunt peaking can help to improve speed. Following the proposed optimization methodology, a high-performance 20-GHz CML divider with an active inductor tank in 0.18-μm complementary metal-oxide-semiconductor is designed as an example. The measured results show that it achieves a FOMPdc of 23.3 dB with only 4.3 mW of power consumption, which provides the correctness of the proposed methodology in the design of high-performance CML dividers.
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