Abstract

In current design the circuitry is extended very close to the edges of a silicon die to maximize useful surface area. When the die is bonded to a polymer substrate, with the circuitry facing the polymer, thermal misfit stress concentrates at the die edges and may damage the circuitry. The stress distribution near a die edge is quantified using a combination of asymptotic analysis and finite element calculation. The asymptotic field consists of two modes of singular stresses, scaling with the distance from the edge r as, respectively, r − λ 1 and r − λ 2 , where λ 1> λ 2. It is shown that the more singular field (i.e. the λ 1-singularity) prevails in an exceedingly small zone, smaller than 10 −6 times the die thickness. Once both modes are included, however, the asymptotic field matches the full field in a zone about 10 −1 times the die thickness. This finding resolves several controversies in the literature on electronic packaging. The near-edge stress distribution is presented for various substrate thicknesses, elastic moduli and thermal expansion coefficients. The results can be used to explore design options.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.