Some electrical and structural properties of Cd/CdS/n–Si/Au–Sb sandwich structure

Abstract

In view of CdS growth is very impotent for technological importance especially solar applications; synthesis of this material remains a topic of great interest for researchers by means of an economically and technically viable method. In the present paper, Cd/CdS/n–Si/Au–Sb sandwich structure has been grown by Successive Ionic Layer Adsorption and Reaction (SILAR) technique. For investigating the structural properties, X-ray diffraction (XRD), scanning electron microscopy (SEM) and energy dispersive X-ray analysis (EDAX) measurements have been performed and it has been seen that films exhibit polycrystalline behavior. The capacitance–voltage (C–V) and conductance/w-voltage (G/w–V) characteristics of Cd/CdS/n–Si/Au–Sb structure have been investigated by considering series resistance and interface states effects. These measurements have been done in the −4V, 4V voltage range and in the frequency range of 10kHz–3MHz at room temperature. It is seen that, the series resistance (Rs) and interface state density have been strongly depend on frequency. The barrier height, donor concentration, diffusion potential parameters have been determined from the linear C−2–V plot. The barrier height values are obtained between 0.495 and 0.796eV and doping density values have been ranged from 1.455×1014 to 1.999×1014cm−3respectively. The capacitance–frequency (C–f) and conductance/w-frequency (G/w–f) characteristics of Cd/CdS/n–Si/Au–Sb structures have been measured at the various biases 0.00–0.14V at room temperature. The energy distribution of the interface states (Nss) and their relaxation time (τ) have been determined from the forward bias capacitance–frequency characteristics. The Nss and τ values have ranged from 2.01×1012cm−2eV−1and 9.68×10−4s in (Ec-0.45)eV–2.86×1013cm−2eV−1 and 3.81×10−4s in (Ec-0.75)eV, respectively.