Fabrication and electrical properties of Al/Safranin T/n-Si/AuSb structure

Abstract

We have fabricated an Al/Safranin T (ST)/n-Si/AuSb device and have investigated its current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) characteristics at room temperature. The barrier height and ideality factor values of 0.78 eV and 3.52 have been obtained from the forward bias current–voltage plot. The value of the barrier height was compared with the barrier height value of 0.50 eV of a conventional Al/n-Si diode. This was attributed to the ST organic film modifying the effective barrier height by affecting the space charge region of the inorganic Si semiconductor substrate. A modified Norde's function combined with the conventional forward I–V method has been used to extract the parameters including barrier height and series resistance. The barrier height and series resistance obtained from Norde's function have been compared with those from Cheung functions, and it has been seen that there is a good agreement between the barrier height values from both methods. It has also been seen that the values of capacitance are almost independent of frequency up to a certain value of frequency, whereas at high frequencies the capacitance has decreased. The higher values of capacitance at low frequencies have been attributed to the excess capacitance resulting from the interface states in equilibrium with the n-Si that can follow the alternating current (ac) signal.