Solder Pad Geometry Studies for Surface Mount of Chip Capacitors

Abstract

An optimized solder pad geometry for surface mounting chip capacitors is developed. In surface mount production poor design can cause low yields and may require expensive redesign, retooling, and reprogramming of equipment. The solder fillets were examined visually for three types of defects. The general procedure used was to surface mount capacitors onto epoxy and alumina substrates using vapor phase reflow and infrared reflow. The solder used was 60Sn/40 Pb. Capacitors used were palladium/silver frit terminated (five-sided termination) and thin-film terminated (end termination only). Visual defects observed as a function of solder pad geometry were opens, misalignment Of chips (rotation), and drawbridges. Geometry of the solder pads was seen to play an important role in the visual defects observed. Of particular importance were the overlap of the pad and the capacitor, the width of solder pads, and the extension of the solder pad outside the capacitor (in the length dimension). Capacitor sizes used were 0805, 1206, and 1210 components.