Abstract

An extensive finite element modeling and experimental testing program has been carried out to determine the most optimum design parameters for solder joints in surface mount applications. Although the analysis and testing (power cycling and thermal cycling) has been carried out for a variety of package styles, particular attention will be paid to the result for leadless ceramic chip carriers. This package is particularly useful in certain high performance military and commercial applications. Analysis and experimentation indicate that increased fatigue life under power cycling can be attained by fabricating solder joints with large fillets and low standoff heights. The large fillet geometry significantly reduces harmful stress concentrations while increasing the net cross-sectional area within the joint. Both factors tend to improve the fracture toughness of the joint. The temperature and frequency dependencies of solder joint fatigue life under power cycling testing is discussed. The observed frequency dependence can be minimized by eliminating harmful tensile strain components thus reducing harmful stress relaxation and tensile induced oxygen embrittlement of grain boundaries. Temperature cycling studies indicate joints with slightly higher standoffs and low fillet angles are more resistant to cyclic fatigue than pillar type joints which tend to focus shear strains at the interfaces. Solder joints can be tapered to improve overall reliability but, in most cases, tapering will provide only a small increase in fracture toughness of the joint through the elimination of stress concentrations. Additional fatigue life increases can be obtained only through an enlargement of the joint cross-sectional area. Aspects of the above results will be presented in detail along with design guidelines for creating high reliability solder joints for various application scenarios.

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