Software-programmable digital pre-distortion on the Zynq SoC

Abstract

Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD. In this paper, we present a software programmable design flow that facilitates the implementation and integration of efficient DPD solutions on Xilinx's Zynq All Programmable SoC, combining industry-standard embedded processors and programmable logic fabric into one chip. In addition to software programmability, another key contribution of this design flow is the flexible partitioning of functionality among hardware and software components, depending on the complexity of the DPD parameter estimation algorithm in use. We have applied processor-specific optimizations to the software implementation and used the Vivado High-Level Synthesis (HLS) tool as the design tool for the programmable logic. Using this design flow, we integrated a complete DPD feedback path on the Zynq SoC that achieves up to 7x speed-up from hardware acceleration.