Abstract

This paper reports the first experimental application of the recently reported quasi-exact inverse (QEI) for memory-polynomial or memory-spline models in the design of a digital predistorter (DPD) linearizing a power amplifier (PA). In comparison to indirect learning architecture, where the coefficients of the DPD are extracted by swapping the input and output variable in any PA model, the DPD extraction is performed from the PA model directly. One of the advantages of using this scheme is that the output noise of the PA is not included in the regression matrix, thus improving the performance. In this paper, B-splines are used to extract the PA model since the performance of the DPD depends on the accuracy of the PA model. The new DPD algorithm relies on an arbitrary number of memory delays as needed for the QEI of the PA model. The evaluation of the model's performance is conducted on a real time application. A Long Term Evolution (LTE) signal of 10 MHz bandwidth is used to compare the performance with a memory polynomial (MP) DPD model used in indirect learning architecture. The measurement results demonstrate that there is a noticeable improvement in terms of Normalised Mean Square Error (NMSE) and Adjacent Channel Power Ratio(ACPR) when using the QEI model for DPD. Note that this is achieved without any iteration as in practical DPD systems. Better results are possible when the PA model represents the PA behavior more accurately.

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