Abstract

Strategies to reduce gate linewidth roughness (LWR) down to the 2 nm required for the sub-20 nm technological node have fallen short. The typical approach is still to apply postlithography treatments to reduce photoresist pattern LWR before transfer. Thermal processing is one among the considered resist smoothing techniques that proved to reduce LWR efficiently. In this study, the authors investigate the smoothing mechanisms involved and show that LWR reduction is linked to the outgassing of deprotected leaving groups present at edge surfaces of the photoresist pattern. Thermal treatment is not as efficient as plasma treatment to reduce 193-nm photoresist linewidth roughness, but results from study suggest that the combination of thermal and plasma treatments could lead to further improvements in LWR.

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