SiP Technology Trends

Abstract

System-in-Package (SiP) has become a mainstream package technology of choice by both IC suppliers and OEMs in recent years, and the adoption of package technology is evidenced by the increasing number of devices that utilize this package technology in handsets and mobile segment. However, the adoption of SiP is not limited to only the mobile market, but is also present in IoT, Wearables, as well as in high-end computing market segments. The drivers for adoption of SiP in each market segments, in addition to package technologies suitable within each segment vary. Amongst the many drivers for SiP adoption, the higher integration trend is a common theme across all market tiers as form factor reduction or miniaturization, performance increase, and faster time-to-market are all enabled by such integration schemes. These integration trends impact not only the OSAT's package technologies, but are also impacting the more traditional module assemblies that were historically done at EMS side. The differentiation between OSATs and EMSs become apparent in the level of integration that each can achieve and how their technologies can complement each other in order to collectively provide the highest level of integration possible. The technology blocks used to achieve this higher integration level in 2D packages include the conversion of package design from laminate FC to FOWLP, integration of passives on RDL, and the implementation of IPD's, or in some cases simply through utilization of improved assembly design rules and adoption of more complex process flows. These 2D SiP technologies are well suited for RF devices, and other types of control modules. For 2.5D package configurations, integration scheme is built on the Package-on-Package (PoP) technology framework, and can incorporate both laminate FCPoP as well as FOWLP (eWLB PoP). Here Interposers in combination with micro-bumps and high density interconnects are also used to enable applications in high-end computing. The value-add through such 2.5D technologies, in some cases is the departure from SoC designs with transition to Si partitioning, which yields lower system level cost in advanced nodes, and in other cases is the enhanced performance and form factor reduction that is enabled.