Abstract
A single-stage amplifier circuits containing transistor as BJT or FET transistor were designed for the microwave application using S-parameters, and developed as a lumped circuit then converted to its equivalent microstrip distributed circuits on different substrates such as Alumina (er=9.8) and Beryllia (er=6.3). The output results as power gain Gp, noise figure NF, and stability factor K were obtained. These results were compared with other published worked included circuits having the same conditions. The comparison shows that in case of the feedback applied to the circuit the Gp achieved about (~1.5) dB for BJT circuits along (0.6-1) GHz and noise figure increased about double, where for FET circuit the increasing in Gp about (7) dB along (2) GHz, and noise figure was less than BJT circuit. The physical characteristics are discussed with respect to substrate and show that the substrate with high permittivity was helpful to reach the higher operating frequency and good power gain values.
Highlights
The development of microwave solid state circuits is directly dependent upon the availability of suitable active devices
The easer method for amplifier circuit design must be guided by a device's measured scattering parameters (S-parameters) to determine the circuit-element values needed to surround an active device or devices in an amplifier design
F) Measuring the noise, if it founds in the form of noise figure (NF) with units, we are using (LNA) but sometime the transistor showed some noise
Summary
The development of microwave solid state circuits is directly dependent upon the availability of suitable active devices. An FET and BJT devices were designed and simulated for microwave applications using S-parameters. Characteristics such as the gain and noise figure were determined for each design. The design of single-stage amplifier would usually have the following specification, which must be calculated: Gain, (G) flatness (1.5) dB, bandwidth (f2-f1), and center frequency (fo), noise figure (NF). For K >1, select the topologies that match the input and output at the upper band edge f2 This will give Gmax , and S11 S22 0 , ideally, for the initial design. Lay out the elements of the complete circuit and check realizably
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