Abstract

We have observed single-electron charging effects in heavily doped polycrystalline silicon nanowires at 4.2 K. Wires of approximately 20 nm by 30 nm active cross section were defined by electron-beam lithography and thermal oxidation in standard polycrystalline silicon material. We have measured a Coulomb staircase and periodic current oscillations with gate bias, attributed to localized carrier confinement resulting from a statistical variation in the intergrain tunnel barriers. A sharp change in the current oscillation period is seen and we speculate that it is due to electrostatic screening of the gate bias by grain boundary defect states.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call