Simulation Study of Single-Event Effects for the 4H-SiC VDMOSFET With Ultralow On-Resistance

Abstract

Silicon carbide (SiC) vertical-diffused metal oxide field transistor (VDMOSFET) is an important power device for aerospace application. However, it is sensitive to heavy particles radiation in space which can cause catastrophic single-event effects (SEEs). In this article, a method of SEE hardening at a high linear energy transfer (LET) value range is studied to the 1.2 kV-rated SiC VDMOSFET by the 2-D numerical simulator SILVACO TCAD. Simulation results illustrate that, compared with the VDMOSFET which only has four buffer (FB-VDMOSFET) layers, the improved MOSFET could increase the abilities of single-event burnout (SEB) and the single-event gate rupture (SEGR) of the device effectively. At the same time, the proposed MOSFET has the lower specific ON-resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on, sp}}$ </tex-math></inline-formula> ) at room temperature. As a result, the gate oxide of the FB-VDMOSFET has reached 7.5 MV/cm and the maximum temperature reached 2480 K at a voltage of 600 V and an LET value of 0.5 pC/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> . However, the maximum temperature of the improved VDMOSFET is 2150 K when <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\mathrm {DS}}$ </tex-math></inline-formula> = 950 V.