Abstract
A compact negative bias temperature instability (NBTI) model is presented by iteratively solving the RD equations in a simple way. The new compact model can handle arbitrary stress conditions without solving time-consuming equations, and is hence, suitable for analogue/mixed-signal NBTI simulations in SPICE-like environments. The model has been implemented in Cadence ADE with Verilog-A and also takes the stochastic effect of ageing into account. The simulation speed has increased at least a thousand times compared to classical RD models. The performance of the model has been validated by both RD theoretical solutions and 140-nm CMOS silicon measurement.
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