Reliability analysis of CMOS inverter subjected to AC & DC NBTI stresses

Abstract

This paper presents an experimental analysis of the impact of AC- and DC-type Negative Bias Temperature Instability (NBTI) stresses on the CMOS inverter DC response and robustness. The results reveal, on one side, that the inverter DC response under AC NBTI presents a parallel shift of that shown under DC NBTI. However, the AC- to DC-induced shift of the inverter logic threshold is found much less than I4 expected in the literature for a 0.5 duty-cycle AC NBTI. Furthermore, valid input logic levels are found much less affected by AC NBTI than by DC NBTI. On the other side, the inverter noise margins have followed different trends under AC NBTI compared to DC NBTI. In fact, while noise margin high (NMH) has increased under both DC- & AC-type NBTI, noise margin low (NML) has shrunk by DC NBTI and trivially affected by AC NBTL Indeed, the inverter robustness is much less degraded by AC-type than by DC-type NBTI. And as such, NBTI models driven from DC stress may overestimate the degradation and therefore improperly predicts the circuit lifetime subjected to NBTI.