Silicon Substrate Engineered High-Voltage High-Temperature GaN-DHFETs

Abstract

Low-cost GaN-on-Si-based transistors are targeted to function at high ambient temperatures. With this perspective, it is aimed to evaluate the high-temperature (HT) capabilities of GaN-on-Si double-heterostructure field-effect transistors. It is highlighted that HT device operation degrades both ON and OFF states that are directly related to the increase in the on-resistance and the decrease in device breakdown voltage; 2-DEG mobility drops with increasing temperature and is responsible for ON-state degradation. Regarding the OFF-state operation, it is observed that at low-voltage operation and with increasing temperature, there is an increase in the OFF-state leakage current because of thermal-assisted electrical conduction across the III-N layers and various interfaces. The main breakdown limiting mechanism at any temperature is, however, buffer leakage along the AlN/Si interface. Because this parasitic conduction, a negative temperature coefficient of breakdown voltage of approximately -1 V/°C is observed. For devices after Si removal, the leakage across the AlN/Si interface is interrupted and therefore HT OFF-state characteristics show high potential to be used at high operating voltage. A breakdown voltage as high as ~1800V is observed after Si removal compared with ~500 V with Si at 150°C.