Silicon nanocrystal memories by LPCVD of amorphous silicon, followed by solid phase crystallization and thermal oxidation

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Silicon nanocrystals memory cells of an n-MOSFET type were fabricated and tested, based on a silicon nanocrystal gate MOS structure fabricated by low-pressure chemical vapor deposition (LPCVD) of amorphous silicon (α-Si) on a tunneling silicon dioxide layer, followed by solid phase crystallization and high temperature thermal oxidation. A layer of silicon nanocrystals embedded in SiO2 at a tunneling distance (3.5 nm) from the silicon substrate was thus formed. The obtained memory cells showed a full-write, full-erase memory window of the order of 0.5 V under charging with pulses of 7 V and -8 V respectively at 100 ms.