Growth of two-dimensional arrays of silicon nanocrystals in thinSiO2 layers by low pressure chemical vapour deposition and high temperature annealing/oxidation.Investigation of their charging properties

Abstract

Two-dimensional arrays of silicon nanocrystals embedded in ultrathinSiO2 layers for application in silicon nanocrystal memories were fabricated by athree-step process: (a) growth of a tunnelling silicon oxide, (b) low pressurechemical vapour deposition (LPCVD) of a thin layer of amorphous silicon(α-Si), and (c) solid phase crystallization of theα-Si layer in a high temperature furnace under nitrogen flow, followed by thermal oxidationin the same furnace. Transmission electron microscopy (TEM) was used for thestructural characterization of the three-layer structure and the determinationof layer thicknesses and silicon nanocrystal size, while capacitance–voltage(C–V) andcurrent–voltage (I–V) measurements were used to investigate the charging properties of the silicon nanocrystallayer. In an attempt to increase the silicon nanocrystal density, as suggested in theliterature, a dip of the oxidized wafer in diluted HF before LPCVD deposition was used,but this step was found to seriously affect the charging properties of the structure.