Abstract
In this chapter, the sigma-delta (Δ–Σ) ADC architecture is discussed from a historical perspective. Next, the basics of sigma-delta ADC are described. Idle tone considerations and the higher order loop considerations are presented. The multibit data scrambling technique both minimizes idle tones and ensures better differential linearity. The digital filter implications are discussed. The digital filter is an integral part of all sigma-delta ADCs. Subsequently, the chapter delves into the topics of Multistage Noise Shaping (MASH) sigma-delta converters, and the high-resolution measurement sigma-delta ADCs and band-pass sigma-delta converters. The last section discusses the sigma-delta DACs, which operate very similarly to sigma-delta ADCs. However, in a sigma-delta DAC, the noise shaping function is accomplished with a digital modulator rather than an analog one.
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