Abstract

The trend in analog–to–digital conversion (ADCs) and digital-to-analog conversions is toward higher speeds and higher resolutions at reduced power levels and supply voltages. This trend has created a number of design and application problems that were much less important in earlier data converters. Single-supply ADCs often have an input range that is not referenced to ground. Finding compatible single-supply drive amplifiers and dealing with level shifting of the input signal in direct-coupled applications also become a challenge. In spite of these issues, components are now available that allow extremely high resolutions at low supply voltages and low power. This chapter includes discussion on the application problems associated with such components and shows techniques for successfully designing them into systems. The most popular ADCs for digital signal processor applications are based on five fundamental architectures. These include successive approximation, sigma–delta, flash, subranging (or pipelined), and bit-per-stage (or ripple). It performs conversions on command. The use of internal switched capacitor techniques, along with auto-calibration techniques, extends the resolution of these ADCs to 16 bits on standard CMOS processes, without the need for expensive thin film laser trimming.

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