Abstract
A brief overview is given of the Sphinx Design System (SDS), a high-level synthesis system consisting of an integrated and interacting set of tools for the synthesis of digital circuits. The system is specifically tuned to the synthesis of digital signal processor (DSP) application specific integrated circuits (ASICs) from behavioral specifications written in Verilog. SDS consists of tools for behavioral, structural and logical synthesis, technology mapping and for simulation. C and SKILL have been used as the implementation and extension languages and the system will be integrated into the Cadence Edge Framework. SPS, the scheduling and allocation subsystem of SDS, is discussed in some detail.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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