Abstract

A model for design representation and levels of abstraction which distinguishes between the various types of levels of synthesis systems is reviewed. The SilcSyn application-specific integrated circuit (ASIC) design system, a synthesis system combining high-level behavioral design, architectural synthesis and optimization, and logic synthesis and optimization, is described. How SilcSyn fits into a total ASIC design environment is shown. That automatic design for testability is a requirement of any synthesis system is proposed, and SilcSyn's method for assuring a high degree of testability is described. An example of an ASIC designed with SilcSyn is presented. >

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call