Abstract
We investigate conservative parallel discrete event simulations for logical circuits on shared‐memory multiprocessors. For a first estimation of the possible speedup, we extend the critical path analysis technique by partitioning strategies. To incorporate overhead due to the management of data structures, we use a simulation on an ideal parallel machine (PRAM). This simulation can be directly executed on the SB‐PRAM prototype, yielding both an implementation and a basis for data structure optimizations. One of the major tools to achieve these optimizations is the SB‐PRAM′s hardware support for parallel prefix operations. Our reimplementation of the PTHOR program on the SB‐PRAM yields substantially higher speedups than before.
Highlights
Large-scale shared-memory multiprocessors are likely to play an important role in parallel computing in the future, because they offer a much simpler programming model than traditional distributed-memory machines
We extend the partitioning strategies investigated by Lin in [21] from static partitioning strategies to dynamic strategies and stealing strategies. This technique yields an upper bound on the speedup for the different benchmark circuits, it does not take into account the overhead for data structures. This can be done by running PTHOR on the SB-parallel machine (PRAM)
Starting with the existing PTHOR implementation from the SPLASH benchmark suite [24], we show how the maximum attainable speedup can be increased by several changes in the data structures, including the data structures for the logical processes (LPs) and the memory management
Summary
Large-scale shared-memory multiprocessors are likely to play an important role in parallel computing in the future, because they offer a much simpler programming model than traditional distributed-memory machines. Many of today’s shared-memory machines are cache-based machines which show good performance for regular applications with appropriate locality but which fail to get good speedups for irregular applications with a lot of non-local memory accesses Typical examples of such applications are particle-based simulations like MP3D [24], routing algorithms like LocusRoute [24], and discrete-event simulations like PTHOR [26]. We extend the partitioning strategies investigated by Lin in [21] from static partitioning strategies to dynamic strategies and stealing strategies This technique yields an upper bound on the speedup for the different benchmark circuits, it does not take into account the overhead for data structures. This can be done by running PTHOR on the SB-PRAM.
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