Abstract
Current drawn by a static CMOS VLSI integrated circuit during quiescent periods is extremely small and is normally of the order of nanoamperes. However, it is remarkably susceptible to a number of failure modes. Many faults present in such ICs cause the quiescent power-supply current (IDDQ) to increase by several orders of magnitude. Some of these faults may not manifest themselves as logical faults, and would not be detected by traditional IC test techniques.In large ICs, it may be hard to distinguish between larger IDDQ due to defects and elevated IDDQ due to normal parameter variations. A statistical characterization of the problem is presented. This can be used to determine the optimal size of partitions. A new information compression scheme is presented which can significantly enhance resolution.
Highlights
There are several reasons for using IDDQ monitoring for testing of ICs [4], [5]
Implementing IDDQ testing prior to burn-in has resuited in a significant decrease in the fall-out [5]
The voltage level under stuck-on or bridging faults in CMOS circuits depend on the relative impedances of the transistors involved and the bridge [22]
Summary
There are several reasons for using IDDQ monitoring for testing of ICs [4], [5]. Traditional IC testing techniques are not effective in detecting a number of failure modes in CMOS ICs. The voltage level under stuck-on or bridging faults in CMOS circuits depend on the relative impedances of the transistors involved and the bridge [22] This makes detection of such faults difficult using voltage measurement techniques. Most of the research in this area considers the use of IDDQ measurement techniques for detection of faults in CMOS circuits. The different types of current probes in use are examined in [28], and a probe circuit has been proposed which allows a system to perform dynamic IDDQ tests as an integral part of the functional testing of a CMOS device. IDDQ based testing requires measurement of an analog quantity rather than a digital signal in case of voltage testing Both the normal and faulty values can vary significantly. As most of the distribution is centered with (/x +_ 3r), we can define the separation between the two distributions as (Figure 2): gap (/J’IDDQf- 30"IDDOf) (/J’IDDQ d- 30"IDDQ)
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