Resistive-Switching Memories

Abstract

In the past decades, resistive-switching random-access memory (RRAM) has been widely studied as one of the promising candidates for next-generation memory technologies. Recently, innovation research on the novel devices for new computing paradigms beyond von Neumann architecture is emerging with the rapid development of artificial intelligence (AI) technologies. With its natural features that can both store and process data, RRAM has been also extensively explored to implement for the new computing paradigms such as brain-inspired computing and in-memory computing. RRAM is a novel device that is based on resistive switching. It has a typical MIM structure where the resistive-switching layer is sandwiched between the top electrode (TE) and bottom electrode (BE). The resistive switching indicates that the device can be reversibly switched between high resistance state (HRS) and low resistance state (LRS). The resistive-switching process from HRS to LRS is called SET, and the reversible process from LRS to HRS is called as RESET. Two kinds of modes including unipolar and bipolar have been observed to switch RRAM. For a fresh RRAM, a so-called Forming process is usually required to achieve the reversible and repeated resistive-switching behaviors. Generally, the Forming voltage is much higher than the switching (SET and RESET) voltage. If the Forming voltage is close to the switching voltage, this RRAM is referred to as Forming-free device. For the physical origins of resistive switching in RRAM, the filament effect has been widely accepted. In this viewpoint, the resistive switching between HRS and LRS is due to the formation and rupture of conductive filament paths inside the resistive-switching layer. According to the composition of the conductive filament (CF), RRAM can be further classified into two types: (1) oxygen vacancy-based RRAM (Ox-RRAM) and (2) metal ion-based RRAM that is also called as conductive-bridge random-access memory (CBRAM). RRAM was initially proposed for the memory application as the next generation of nonvolatile memory candidate in the early 2000s. Especially, Samsung presented a paper at the International Electron Devices Meeting that demonstrated the highly scalable characteristics in NiO memory cells integrated with conventional complementary metal oxide semiconductor (CMOS) with a one-transistor–one-resistor (1T1R) device structure. That further intensified the research activity on RRAM. Up to now, significant technical advances have been achieved in the device performance and integration, including great scalability (<10 nm), fast speed (<1 ns), low operation voltage (<1.5 V) and current (<1 μA), high endurance (>1012 cycles), and long retention (>10 years at room temperature). The 3D integration approaches were also proposed for the high density of RRAM integration. The testing memory chips more than 16 G-bits have been reported and demonstrated. In 2008, HP group published a paper to establish the link between RRAM and “memristor,” where the concept of “memristor” was proposed and defined by L. Chua in the 1970s. Later, RRAM or memristor was proposed and demonstrated to implement the stateful logic, in which Boolean logic states were operated and stored in resistance of RRAM. In 2012, a collaboration work from Stanford University and Peking University reported a RRAM-based electronic synapse with multilevel states (>400 states) and ultra-low spiking energy (<1 pJ/per spiking) and then further demonstrated a 3D integration approach to achieve both high uniformity and low spiking energy in 2014. This strongly stimulates the RRAM research activities that extend RRAM to much wider areas beyond memory. Especially accompanying with the development of AI, the new computing paradigms beyond von Neumann such as brain-inspired computing are highly desired to overcome the bottleneck of so-called memory wall from the traditional von Neumann architecture. Research activity has been primarily driven by the search for ideal neuromorphic devices. RRAM was paid much more attention due to the featured functions of computing in memory, which is beneficial for the brain-inspired computing systems. More recently, while a lot of research efforts still remain focused on the device level, the demonstrations of the arrays in circuit/system level are increasingly common. Various RRAM array-based chips for both memory and brain-inspired computing applications were reported. In this chapter, we will review the latest advancements in RRAM. Firstly, the physical mechanism on resistive-switching characteristics of both Ox-RRAM and CBRAM are discussed in Sect. 29.2. Then, the physics-based models and simulation methods are presented in Sect. 29.3. In Sect. 29.4, the array design and optimization technologies are addressed and discussed. The system applications of RRAM in emerged memory and novel computing paradigms for brain-inspired neural network are explored in Sect. 29.5. Finally, the prospect of future technological trend is highlighted in Sect. 29.6.