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Abstract
Bipolar resistance switching characteristics are demonstrated in Pt/ZnO/Pt nonvolatile memory devices. A negative differential resistance or snapback characteristic can be observed when the memory device switches from a high resistance state to a low resistance state due to the formation of filamentary conducting path. The dependence of pulse width and temperature on set/reset voltages was examined in this work. The exponentially decreasing trend of set/reset voltage with increasing pulse width is observed except when pulse width is larger than 1 s. Hence, to switch the ZnO memory devices, a minimum set/reset voltage is required. The set voltage decreases linearly with the temperature whereas the reset voltage is nearly temperature-independent. In addition, the ac cycling endurance can be over 106switching cycles, whereas, the dependence of HRS/LRS resistance distribution indicates that a significant memory window closure may take place after about 102 dc switching cycles.
Highlights
Developments of generation nonvolatile memory (NVM) devices are required because the physical limitations of traditional Flash memory devices are approaching
After the forming process, the memory device is in low resistance state (LRS)
By sweeping the voltage in negative side without a current compliance (I comp), the device current decreases suddenly at a reset voltage (Vreset) or a reset current (Ireset), and the device is switched from an LRS to an high resistance state (HRS)
Summary
Developments of generation nonvolatile memory (NVM) devices are required because the physical limitations of traditional Flash memory devices are approaching. The resistance switching behavior has been reported for a variety of materials such as perovskite-type oxides [1, 3], binary metal oxides [2,3,4], solid-state electrolytes [4], organic compounds [6], and amorphous Si [7] In these RRAM materials being studied, binary metal oxides are most potential due to their simple constituents, good compatibility with CMOS processes, and resistive nature to thermal/chemical damages [2, 4, 8]. Experimental results show that a minimum set/reset voltage is required to switch the ZnO memory devices. The dependence of HRS/LRS resistance distribution on set/reset switching cycles indicates that the memory window begins to close after about 100 voltage sweeping cycles. The dc cycling endurance is detrimental, the ac cycling endurance over 106 switching cycles can be achieved
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