Remapping NUCA: Improving NUCA Cache's Power Efficiency

Abstract

Power efficiency has been recognized as an important factor of the computing technology. On-chip caches represent a sizable faction of the total power consumption of microprocessors. Non-uniform cache access (NUCA) cache split the cache into several tiles, which enables the ability to power down some tiles at run time. We observed that some workloads have related small working set, thus we can dynamic power down some tiles at runtime to save leakage power with little performance degradation. In this paper, we propose Remapping NUCA, a mechanism to power down some tiles to improve the NUCA cache's power efficiency. Experimental results show that our mechanism can save 39.58% power on average with less than 5% performance degradation. Finally we point out some directions to further improve the NUCA cache's performance and power efficiency.