Reference Injected Phase-Locked Loops (PLL-RIs)

Abstract

In this paper, we use synchronization to reduce phase-locked loop (PLL) phase noise and improve its locking behavior with an attenuated reference signal injection (RI) into a voltage-controlled CMOS delay-line ring-type oscillator. The transient and steady-state behavior of the PLL-RI are described by a nonlinear differential equation, which is further studied by the phase-plane method. The nonlinear equation is linearized for the small-signal condition and the s-domain noise transfer functions and noise bandwidths for different noise sources are derived. The effect of the loop parameters and the injection strength on the output phase noise, loop settling time, and lock in range is analyzed. Finally, the analysis is verified by the SPICE simulation and measurement results from an 1-GHz PLL-RI with 130-nm standard RF CMOS technology. Simulation and measurement results show phase noise reduction and improved settling behavior of a PLL-RI compared with a conventional PLL.