Reduction of Surface Stacking Faults on N‐Type Silicon Wafers

Abstract

Surface stacking faults found on N‐type <100> silicon wafers after a 1100°C steam oxidation have been studied using a combination of chemical etching, light microscopy, transmission electron microscopy, and energy dispersive x‐ray analysis. Metal contamination (particularly Cu and Ni) present in the furnace during oxidation has been identified as a major source for these stacking faults. Results indicate that the reason N<100> wafers usually form stacking faults rather than S‐pits in the presence of metal contamination is that their surfaces can more easily be contaminated with metals. Observations show that this enhanced sensitivity to metals (as compared to other wafer types and orientations) may be a result of both (i) fewer bulk defects available for intrinsic gettering, and (ii) surface orientation characteristics. N<100> surface stacking fault densities can be reduced by both furnace cleaning procedures and back‐surface gettering treatments.