Reduced-Complexity Pipelined Architectures for Finite Field Inversions

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In previous work, we have proposed systolic inversions architectures based on a modified extended Euclidean algorithm (MEEA). Utilizing properties of the dependence graphs based on this MEEA, we propose new systolic inversion architectures that achieve the same throughput, latency, and critical path delay as the inversion architectures we previously presented but with reduced hardware complexity. More importantly, this approach can be utilized to reduce hardware complexities of other inversion and division architectures