Abstract

As we approach the end of Moore’s law, many alternative devices are being explored to satisfy the performance requirements of modern integrated circuits. At the same time, the movement of data between processing and memory units in contemporary computing systems (‘von Neumann bottleneck’ or ‘memory wall’) necessitates a paradigm shift in the way data is processed. Emerging resistance switching memories (memristors) show promising signs to overcome the ‘memory wall’ by enabling computation in the memory array. Majority logic is a type of Boolean logic which has been found to be an efficient logic primitive due to its expressive power. In this review, the efficiency of majority logic is analyzed from the perspective of in-memory computing. Recently reported methods to implement majority gate in Resistive RAM array are reviewed and compared. Conventional CMOS implementation accommodated heterogeneity of logic gates (NAND, NOR, XOR) while in-memory implementation usually accommodates homogeneity of gates (only IMPLY or only NAND or only MAJORITY). In view of this, memristive logic families which can implement MAJORITY gate and NOT (to make it functionally complete) are to be favored for in-memory computing. One-bit full adders implemented in memory array using different logic primitives are compared and the efficiency of majority-based implementation is underscored. To investigate if the efficiency of majority-based implementation extends to n-bit adders, eight-bit adders implemented in memory array using different logic primitives are compared. Parallel-prefix adders implemented in majority logic can reduce latency of in-memory adders by 50–70% when compared to IMPLY, NAND, NOR and other similar logic primitives.

Highlights

  • Extraordinary innovation in the field of Integrated circuits is the last 50 years was based onMoore’s law scaling and predominantly the Complementary Metal Oxide Semiconductor (CMOS)technology

  • Majority logic did not become the dominant logic to compute in CMOS technology because it was more efficient to implement NAND/NOR gate than a majority gate (12 transistors for an inverted majority gate compared to 6 transistors for NAND3/NOR3)

  • In many emerging post-CMOS devices, a majority gate can be implemented efficiently and majority logic needs to be re-evaluated for its computing efficiency

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Summary

Introduction

Extraordinary innovation in the field of Integrated circuits is the last 50 years was based on. Reduction in logical depth compared to And-Invert Graphs (AIGs) produced by Berkeley’s ABC synthesis tool [12] Such findings from research in logic synthesis implies that circuits implemented using majority logic will be better regardless of the post-CMOS device used. We limit our discussion to how majority logic could be implemented using RRAM technology since in-memory computing is the focus of this review.

Memristive Logic
In-Memory Majority Logic
V–R Majority Logic
R–V Majority Logic
In-Memory One-Bit Full Adders Using Different Logic Primitives
In-Memory Eight-Bit Adders Using Different Logic Primitives
Logic Levels
Findings
Conclusions
Full Text
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