Abstract
In the recent VLSI technology design, as the semiconductor technology is approaching towards 100nm feature size and will soon be below 100nm, there exist new challenges in the design of analog-digital mixed signal circuit design with low power, low delay and high speed as main constraints. ADC's are widely used in modern communication and digital signal processing. Flash ADCs provide very high conversion rates and is commonly used for low power and high-speed applications [6]. This paper presents the design of a reconfigurable Flash ADC in which 15 TIQ comparators are used both for the working of 2-bit as well as 4-bit Flash ADC. For the high analog input 4-bit ADC is switched on and similarly for the low analog voltage 2-bit ADC is on, thus making the ADC reconfigurable. Number of comparator count is reduced in reconfigurable ADC. It employs TIQ technique which uses 2^n-1 comparators and high-speed MUX based encoder circuitry for higher efficiency. The ADC has been designed in CMOS 90nm technology using Cadence design environment and the simulation result shows that reconfigurable ADC significantly lowers the power consumption to 3.80 µW with a delay of 826.5 µs.
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