Readout of silicon strip detectors with position and timing information

Abstract

Low-noise front-end amplifiers for silicon strip detectors are already available for decades, providing excellent signal-to-noise ratio and thus very precise spatial resolution, but at the cost of a long shaping time in the microsecond range. Due to occupancy and pile-up issues, modern experiments need much faster electronics. With submicron ASICs, adequate readout and data processing, it is possible to obtain not only spatial hit data, but also accurate timing information—a feature which is rarely exploited so far. We present the concept of a silicon vertex detector readout system intended for an upgrade of the Belle experiment at KEK (Tsukuba, Japan). The APV25 front-end chip, originally developed for CMS at CERN, is used in a way where it delivers multiple samples along the shaped waveform, such that not only the analog pulse height, but also the timing of each particle hit can be determined. We developed a complete readout system including an FADC + Processor VME module which performs zero-suppression in FPGAs. The hit time measurement is also planned on the same module. As fast amplifiers are inherently more susceptible to noise, which largely depends on the load capacitance, the front-end chips should be located as close to the detector as possible. On the other hand, the material budget, especially in a low-energy electron–positron machine such as Belle, should be minimized. We tried to merge those demands with a fully functional “Flex_Module”, where thinned APV25 readout chips are mounted on the silicon sensor.