Abstract

The raised source/drain (RSD) structure is one of thin film transistor designs that is often used to improve device characteristics. Many studies have mentioned that the high impact ionization rate occurring at a drain side can be reduced, owing to a raised source/drain area that can disperse the drain electric field. In this study, we will discuss how the electric field at the drain side of an RSD device is reduced by a vertical lightly doped drain (LDD) scheme rather than a RSD structure. We used different raised source/drain forms to simulate the drain side electric field for each device, as well as their output characteristics, using Integrated Systems Engineering (ISE-TCAD) simulators. Different source and drain thicknesses and doping profiles were applied to verify the RSD mechanism. We found that the electric fields of a traditional device and uniform doping RSD structures are almost the same (~2.9 × 105 V/cm). The maximum drain electric field could be reduced to ~2 × 105 V/cm if a vertical lightly doped drain RSD scheme was adopted. A pure raised source/drain structure did not benefit the device characteristics if a vertical lightly doped drain design was not included in the raised source/drain areas.

Highlights

  • Polycrystalline silicon thin-film transistors (Poly-Si thin film transistor (TFT)) with low temperature processes fabricated on plastic or glass have been widely used in memory, active-matrix liquid crystal display (AMLCD), peripheral driver and pixel switches circuits, and 3-D integrated circuits, because of their high field effect mobility and driving current compared with amorphous silicon [1,2]

  • The conventional poly-Si TFT has a high electric field near the channel/drain junction. It is the major cause of impact ionization, which leads to a serious kink effect and degrades the device characteristics and breakdown voltage [3,4]

  • The works in the literature [12,14] proposed an raised source/drain (RSD) device combined with an offset gated structure, that employed a double-channel to improve the high series resistance in the offset region and increased the on-state current

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Summary

Introduction

Polycrystalline silicon thin-film transistors (Poly-Si TFTs) with low temperature processes fabricated on plastic or glass have been widely used in memory, active-matrix liquid crystal display (AMLCD), peripheral driver and pixel switches circuits, and 3-D integrated circuits, because of their high field effect mobility and driving current compared with amorphous silicon [1,2]. Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. The conventional poly-Si TFT has a high electric field near the channel/drain junction.

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