Radiation hardening by design

Abstract

Historically, specialized foundry processes have been utilized to produce radiation hardened microelectronics. Radiation hardness by design techniques have been shown to be capable of producing devices of sufficient hardness to resist the deleterious effects of the natural radiation environment of space utilizing standard commercial processes. A description of the nature of radiation effects in microelectronics is presented followed by design techniques effective in mitigating single event effects in both static memory cells and combinational logic. A formal method based on the theory of asynchronous sequential circuits is used to analyse memory cells for recovery properties. A dual rail n-channel metal oxide semiconductor (NMOS) structure with a cross coupled output buffer dramatically reduces the susceptibility of combinational logic to propagation of single event transients.