Abstract
Welcome to the 11th ACM/IEEE International Symposium on Low Power Electronics and Design!.The 2006 edition of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) welcomes you to the beautiful, on-the-lake setting of the Tegernsee area in Germany, within a one hour drive from Munich. On a par with this great location, a strong and diverse technical program features two keynote talks from leaders in the field, a technical panel, four embedded tutorials, and, new for this year, three half-day tutorials scheduled for the last day of the symposium.Dr. Christoph Kutter, Senior VP Products and Systems, Infineon Technologies, will give a keynote on design challenges for mobile communication devices. The Thursday keynote is given by Barry Dennington, Senior Vice President, NXP Semiconductors/CTO/SoC Design Technology, who will present an industrial view on the demands of a convergent communications, consumer and automotive market, the technology challenges a semiconductor company faces and the solutions that lead to actual products with a few examples. The Friday panel is titled Flexibility and Low Power; a Contradiction in Terms?. Moderated by Peter Wintermayr, Editor in Chief of Markt and Technik, panelists Reiner Hartenstein, Univ. Kaiserslautern; Heinrich Meyr, RWTH Aachen Univ. and Chief Scientific Officer CoWare; and Steve Leibson, Tensilica, will discuss whether configurable or re-configurable computing offer solutions for low power design.The four embedded tutorials during the first two days of the conference are organized around two major themes: (1) low power circuit design and technologies; and (2) low power systems and energy management. Two embedded tutorials on sub-threshold design and variability/low power design from experts from MIT, University of Michigan, and IBM Research are paired with two others on energy harvesting for battery limited systems and low power portable applications from researchers from NEC Labs and University of California. New for this year, ISLPED will offer three half-day tutorials on hot topics such as leakage aware design, micropower analog design, and addressing fault-tolerance/variability and power issues from system to circuit levels. The tutorials feature presenters from OFFIS, Intel, University of North Carolina, Carnegie Mellon University, and IBM Research.Out of 214 submissions received in early March, only 75 strong technical papers were accepted for presentation in paper or poster sessions, yielding an acceptance rate of 26% for regular and short papers (56 papers), or 35% including 19 posters. Topics range from low power analog and RF design, power aware circuit design and tools, and architecture techniques for low power, to system and application level power management. The program is organized in twelve technical sessions featuring long (30 min) and short (20 min) paper presentations, as well as two interactive poster sessions that will provide an additional venue for authors and symposium attendees to interact in an informal setting. Following the tradition of ISLPED, this year's event also includes exhibits featuring tools and methodologies from leading vendors of low power or power-aware design tools. New for this year, the program includes an industry session that will highlight contributions showcased by companies participating in the ISLPED exhibits. Winning entries to the annual Low Power Design Contest will also be featured in a separate technical session.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.