Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08

Abstract

Welcome to the 13th ACM/IEEE International Symposium on Low Power Electronics and Design! The 2008 edition of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) welcomes you to Bangalore, India also known as "The Silicon Valley of India." The conference is hosted by Indian Institute of Science which is celebrating its centennial year. On a par with this great location, a strong and diverse technical program features six plenary talks from leaders in the field plus another embedded invited talk, two evening panel sessions as well as six embedded tutorials. On the first day, Jaswinder Ahuja, Corporate VP, Cadence and Chairman of India Semiconductor Association, will deliver a talk about a collaborative approach towards a green electronic world. The evening session on Monday will feature a distinguished panel of guests discussing the tradeoffs and costs in achieving power reduction in designs. The morning plenary talk on Tuesday will feature Norm Jouppi HP Fellow and Director of the Exascale Computing Lab speaking about the system implications of integrated photonics. The afternoon plenary talk will be delivered by Tahir Ghani, Intel Fellow and Director of Transistor Technology and Integration. His talk will cover innovations to extend CMOS transistors to the limit. The evening panel session features another selection of distinguished panelists to discuss where the next 100x in power improvements are going to come from in multi-core designs. The first plenary talk on Wednesday will be delivered by Janick Bergeron, Synopsys Fellow, on advances in low power verification. The first afternoon plenary talk on Wednesday will be given by Professor Todd Austin and he will be speaking on the rules of low power design and how to successfully break them. The final plenary session of the conference will be delivered by Professor Takayasu Sakurai. His talk will be on next the generation of low power designs and systems. Out of 159 submissions received, 63 strong technical papers were accepted for presentation in paper or poster sessions, yielding an acceptance rate of 31% for regular and short papers (50 papers), or 40% including 13 posters. Topics range from low power technology, circuits, and memory; low voltage analog and RF design; power aware design and tools; power efficient architecture techniques; and system and application level power optimization. The program is organized into twelve technical sessions featuring long (30 min) and short (20 min) paper presentations, as well as one interactive poster sessions that will provide an additional venue for authors and symposium attendees to interact in an informal setting. Following the tradition of ISLPED, this year's event also includes exhibits featuring tools and methodologies from leading vendors of low power or power-aware design tools. The program also includes an industry session that contains an invited talk and a tutorial with presenters from companies participating in ISLPED. Winning entries to the annual Low Power Design Contest will also be featured in a separate technical session. Such a rich and strong program would have not been possible without the help of an outstanding Technical Program Committee who has worked for weeks reviewing and selecting the best papers. Our many thanks go to the 2008 ISLPED officers who have made everything work like clockwork: Ali Keshavarzi and Joerg Henkel, general vice-chairs; Bharadwaj Amrutur, Local Arrangements; Yuan Xie, Treasurer; Qing Wu and Vasantha Erraguntla, Exhibits; Poras Balsara, Yu Cao, Design Contest; Farzan Fallah, Shaleen Babu, Publicity, Yung-Hsiang Lu, Web Chair. Partha Ranganthan, Panels and Prasanth Mangalagiri, Submissions. We express our special thanks to Prof. Govindarajan, Ms. Chaitra Rajeevalochana and student volunteers from IISc for local arrangements.