Primary input cones based on test sequences in synchronous sequential circuits

Abstract

When an output bi of a combinational circuit depends on a subset of inputs Ai, it is sufficient to specify values for inputs included in Ai during test generation for faults in the input cone of bi, which are detectable on bi. This property can be used to facilitate off-line and built-in test generation, and enhance test compaction, test data compression and test power reduction. In this work the authors investigate an analogous property of test sequences for synchronous sequential circuits. The authors demonstrate that a test subsequence for a target fault may need to specify values only for a subset of primary inputs, leaving the remaining primary inputs unspecified at all the time units of the test subsequence. Furthermore, test sequences obtained for different circuits by specifying different subsets of primary inputs in different parts of the sequence have certain common properties that are highlighted by the use of incompletely specified primary input vectors. These properties can be expressed in a circuit-independent form. The usefulness of these properties is demonstrated by using them as part of a simulation-based test generation procedure. The authors also discuss properties of the subsets of primary inputs that are useful in detecting target faults when their values are specified. These properties can be used to define primary input cones for a synchronous sequential circuit.