Abstract
Power efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. We address a power optimization method for real-time embedded applications on a variable speed processor. The method combines off-line and on-line components. The off-line component determines the lowest possible maximum processor speed while guaranteeing deadlines of all tasks. The on-line component dynamically varies the processor speed or bring a processor into a power-down mode to exploit execution time variations and idle intervals. Experimental results show that the proposed method obtains a significant power reduction across several kinds of applications.
Highlights
Power consumption has been a critical design constraint in the design of digital systems due to widely used portable systems such as cellular phones and PDAs, which require low power consumption with high speed and complex functionality
Another method is to use a variable speedprocessor (VSP), which can change its speed by varying the clock frequency along with the supply voltage when the required performance on the processor is lower than the maximum
We propose a power optimization method for a real-time embedded application on a variable speed processor
Summary
Power consumption has been a critical design constraint in the design of digital systems due to widely used portable systems such as cellular phones and PDAs, which require low power consumption with high speed and complex functionality. The first is to bring a processor into a powerdown mode, where only certain parts of the processor such as the clock generation and timer circuits are kept running Another method is to use a variable speedprocessor (VSP), which can change its speed by varying the clock frequency along with the supply voltage when the required performance on the processor is lower than the maximum. Our approach is strongly motivated by the fact that there are several kinds of sources for idle intervals in a schedule of a real-time task set. With the maximum speed of the VSP set to the computed value, we dynamically varies the speed of the VSP or bring the VSP into a powerdown mode to exploit execution time variation of each task and idle intervals present in the schedule.
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