Polarity-Controllable Silicon Nanowire Transistors With Dual Threshold Voltages

Abstract

Gate-all-around (GAA) silicon nanowires enable an unprecedented electrostatic control on the semiconductor channel that can push device performance with continuous scaling. In modern electronic circuits, the control of the threshold voltage is essential for improving circuit performance and reducing static power consumption. Here, we propose a silicon nanowire transistor with three independent GAA electrodes, demonstrating, within a unique device, a dynamic configurability in terms of both polarity and threshold voltage ( \(V_{T}\) ). This silicon nanowire transistor is fabricated using a vertically stacked structure with a top-down approach. Unlike conventional threshold voltage modulation techniques, the threshold control of this device is achieved by adapting the control scheme of the potential barriers at the source and drain interfaces and in the channel. Compared to conventional dual-threshold techniques, the proposed device does not tradeoff the leakage reduction at the detriment of the ON-state current, but only through a later turn-ON coming from a higher \(V_{T}\) . This property offers leakage control at a reduction of loss in performance. The measured characteristic demonstrates a threshold voltage difference of \(\sim 0.5\) V between low- \(V_{T}\) and high- \(V_{T}\) configurations, while high- \(V_{T}\) configuration reduces the leakage current by two orders of magnitude as compared to low- \(V_{T}\) configuration.