Planar Transformer with None Overlapping Winding as Current Balancing Compensator for Paralleled SiC MOSFETs

Abstract

Thanks to the high switching frequency and low switching loss, SiC MOSFET devices have become more popular for high-frequency power converters. however, the active area of SiC MOSFETs is limited by some physical reasons, and consequently, their current rating is low. To use Sic MOSFETs in high current applications, they must be implemented in parallel with each other. One of the main challenges of the parallel connection of these switches is their transient current distribution, which in fact causes unbalance current sharing between them. This paper introduces a new passive approach, practical, simple, and low-cost method to suppress imbalance current in paralleling SiC MOSFET device by using a new type of planar transformer (PT) that called none overlapping winding (NOW) structure. Using the proposed planar transformer is convenient to compare with the conventional transformer due to its predictable and adjustable parasitic parameters. Generally, the parasitic parameters of the transformer have a severely detrimental effect on the current sharing of SiC MOSFETs. The effect of parasitic parameters Theoretically is considered and analyzed and the PT NOW structure with minimum parasitic elements is extracted. the effectiveness of the proposed approach first is considered by Finite Element Method (FEM) simulations and finally verified by simulation results.