Performance of a CMOS compatible polysilicon bipolar transistor with high energy ion implanted collector

Abstract

This paper presents the characteristics of bipolar transistors developed in a submicron CMOS technology. The collector is formed by high energy phosphorus implantation as is the PMOS well (``retrograde'' well). The performance of such devices is evaluated on ECL ring oscillators, and analysed via SPICE simulations. It is demonstrated that using the PMOS well as collector of the bipolar transistors, with an optimised design, a reasonable performance can be obtained with a very low cost BICMOS technology.