Abstract
In this manuscript, a novel line tunneling based gate-on-source-only TFET with inverted T-shaped channel (ITGOSO-VTFET) is proposed and investigated using Synopsis TCAD 2-D simulator. The GOSO configuration along with dual counter-doped pockets (CDP) improve the ON-state current by enhancing the tunneling rate of charge carriers at source/channel interface while inverted T-shaped channel helps the proposed device in reducing the OFF-state (IOFF) and ambipolar (IAMB) currents. In comparison with double-gate (DG) and GoSo-CDP TFET, the order of IOFF (IAMB) in ITGOSO-VTFET are found to be improved by ∼6 (∼4) and ∼7(∼3), respectively. Furthermore, the impact of varying design parameters is analyzed in order to obtain the optimized performance of the proposed device. Apart from improvement in DC performance, ITGOSO-VTFET is also found to offering a much better analog/RF performance in terms of various parameters like gm, fT, TFP, GBP, and τ, which eventually makes the proposed device more suitable for low power and high-speed applications.
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