Performance Improvement of Si-NC Memory Device by Using a Novel Junction Assisted Programming Scheme

Abstract

To enlarge memory window of Si nanocrystal (Si-NC) memory devices, a junction assisted programming scheme is proposed in this paper. Firstly, a negative drain voltage pulse is applied to forward-bias PN junction and charge junction capacitance. After that, a conventional channel hot electron (CHE) programming scheme is immediately used. Comparing with conventional CHE programming scheme, this proposed scheme shows a much larger memory windows. Meanwhile, high program speed, good endurance (over 104 cycling times) and better data retention have also been achieved from experiment.