Performance improvement of junctionless field effect transistors using p-GaAs/AlGaAs heterostructure

Abstract

The performance analysis of junctionless (JL) gate-all-around (GAA) metal oxide semiconductor field effect transistors (MOSFETs) is investigated using the Non-Equilibrium Green's Function (NEGF) formalism. The main problem of JL transistors is found to be the OFF-state current. In the present work, the OFF-state current of such devices is decreased by choosing channel materials with a large band gap and heavy effective mass. Our simulation results show that the OFF-state current of JL transistors with p-type GaAs is less than that of n-type GaAs. Plus, the heterostructure (HES) channel is proposed in this study for improving the device characteristics of JL-FETs as compared to homostructure (HOS). Therefore, p-type GaAs and GaAs/AlGaAs are used as the channel material for HOS and HES devices, respectively. The simulation is performed for different thicknesses of GaAs and AlGaAs with a fixed diameter of 5 nm for the nanowire. It is shown that the optimum electronic characteristics of HES devices is achieved when the thicknesses of GaAs and AlGaAs layers are chosen to be 0.5 nm and 4 nm, respectively. OFF-state current (IOFF) of 5.32 × 10−16 A, ON-state current (ION) of 6.44 × 10−6 A, ON/OFF current ratio (ION/IOFF) of 1.21 × 1010, subthreshold slope (SS) of 60.8 mV/dec, drain induced barrier lowering (DIBL) of 4.6 mV/V, and threshold voltage (VTH) of 330 mV are obtained for the proposed HES JL-GAA-FET.