Abstract
Off-current and threshold voltage fluctuations in trigate (TG), and single-gate (SG) silicon-on-insulator (SOI) MOSFETs with a gate length of 10 nm are studied by means of three-dimensional (3D) device simulations. Special emphasis is paid to the role of the channel design. We demonstrate that both geometry fluctuations and the presence of single charged impurities in the active device regions can easily alter the off-currents of SG and TG MOSFET designs that nominally meet the Ion/Ioff requirements by more than one order of magnitude. It will be shown that regarding the robustness against geometry fluctuations, neither the SG MOSFET nor one of the possible TG MOSFET designs can be preferred in general. The SG concept, however, turns out to be exceptionally robust against threshold voltage fluctuations caused by single charged impurities.
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