Performance enhancement of solution-processed p-type CuI TFTs by self-assembled monolayer treatment

Abstract

Self-assembled monolayer (SAM) treatment of gate dielectrics plays a key role in the improvement of the electrical performance of organic thin-film transistors (TFTs) by reducing the interface traps. However, it is rarely explored in inorganic TFTs owing to possible irreversible damage to very thin SAMs during the sputtering and high-temperature annealing processes that are often used to deposit inorganic materials. Here, the feasibility of performance enhancement of inorganic p-type Zn-doped CuI TFTs is explored by a SAM treatment using 3-aminopropyltriethoxysilane (APTES) on the gate dielectric. Our result shows that the TFT performance is significantly enhanced with a 50% reduction in the interface trap density, a 326% increase in the hole mobility from 0.38 to 1.24 cm2V-1s-1and a 5-fold increase in the current on/off ratio from 2.6 × 106 to 1.1 × 107. In addition, the bias stress stability of the TFTs after the treatment is dramatically enhanced by a factor of 10 due to the improved interface properties. The threshold voltage shift is reduced from +19.6 to +1.8 V after 3600 s positive bias stress. The simple yet effective interface treatment approach may have great potential in the fabrication of high-performance inorganic p-type electronic devices.