Performance enhancement of digital gates using threshold logic

Abstract

This paper explores the use of threshold logic for the design of digital circuits well suited for low voltage and low power applications. CMOS digital gates such as AND, OR, NAND, NOR, XOR and XNOR require large chip area along with the limitations of low speed and high power dissipation. Threshold logic has emerged as an alternative technique for low power and high speed digital circuit design. In this paper, we have designed basic digital gates such as AND, OR, NAND, NOR, XOR and XNOR using threshold logic and compared them with conventional CMOS digital circuits. It has been observed that digital gates implemented using threshold logic require less transistors and exhibit better performance in terms of propagation delay and energy delay product as compared to CMOS designs. The functionality of these circuits has been verified by PSpice simulations carried out using level 7 parameters in 0.13 μm CMOS technology with supply voltage of 1 V.