Performance Enhancement of Content Addressable Memory with Precharge Free Technique

Abstract

Content Addressable Memory (CAM) is a hardware based parallel look up memory architecture, best suited for high speed applications. It finds applications in lookup tables, associative computing, databases and networking, etc. CAM implements parallel comparison scheme to reduce search delay, at the cost of large area and high power consumption. The precharge free matchline (ML) scheme eliminates the precharge cycle in the conventional CAM architecture and this significantly reduces the power consumption. In this brief, the CAM architecture with good search performance is proposed. The proposed high performance CAM architecture reduces both the power and area. Also, it is useful for systems requiring larger word lengths. The proposed high speed CAM architecture is implemented in predictive high performance 45nm cmos process at 1 V supply voltage.