Abstract

In this paper, we have demonstrated the performance analysis of a planar junctionless (JL) silicon-oxidenitride-oxide-silicon (SONOS) memory cell implemented on the bulk and silicon-on-insulator (SOI) substrate wafer. Both cells are simulated using extensive two dimensional device simulator and compared on the basis of improved memory characteristics. The JL SOI SONOS exhibits larger memory window within a specified programming time as compared with the JL bulk type. The erasing efficiency of the JL bulk SONOS is better due to incorporation of carriers from the substrate end and it also has the advantage of tunable channel layer that can be controlled by substrate doping.

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